Organ Repair

Scientists are working on a new way to repair organs. As this ScienCentral News video reports, they're trying to build replacement parts using a three-dimensional printer.

Printing Organs

At the bottom of the basement stairs in the physics building at the University of Missouri-Columbia, and just to the left, there is a brown steel door marked "Research." Behind it fluorescent lights hum, a miniature guillotine clicks, and a printer paces back and forth.

But this is no mad scientist's den, nor is it a traditional physics laboratory. Here researchers, led by biological physicist Gabor Forgacs are developing a three-dimensional printing technique that may one day be used to engineer replacement parts for worn-out or diseased organs. It is a method they hope will ultimately reduce the number of whole organ transplants needed by providing patients with just the spare parts they need.

"In twenty years," says University of Washington Department of Surgery burn specialist Nicole Gibran, "This may be what we're doing."

"The primary manifestation of this technology," says Forgacs, "perhaps in practice, will be grafts, skin grafts, vascular grafts, and the like, but not necessarily complicated organs as in livers or hearts."
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Fountain Pen Revival

What was old is now new again. Who would have thought that the fountain pen would be used again for modern cutting edge technology, but that is just what is happening at Northwestern University in Chicago. Researchers have recently re-invented the fountain pen on a microscale level by developing a pen that can write on the molecular level!



The "nanoscale fountain pen" was constructed using microfabrication techniques based on silicon fab technology. The research behind this device stems from dip pen nanolithography (DPN), which combines microelectronics fabrication and microfluidics to achieve molecular manipulation at the nanoscale level.

Where do electronics and photonics meet?

For 50 years we have seen a continual progression of smaller and more powerful electronic devices. Till today it seems everything you touch includes some sort of electronic device. It seems likely that may be changing. There is considerable research going on into photonics. Essentially replacing electrons with photons as the mechanism for all these activities. It seems that chips designed around photonics would use less energy and carry more data and work directly with fiber optic comminications networks. The trick is how to interface these photonic devices with electronic devices for the things that photonics are not able to do. Researchers at Cornell may have developed the first part of an answer. They have developed a silicon based device that can use an electronic signal to create a photonic signal. We are talking about nanostructures here. So check it out.

DACs jammed with functionality

Multichannel digital-to-analog converters (DACs) from Analog Devices Inc. (ADI) are said to pack the highest concentration of analog signal processing performance in a single chip.
Developed using ADI's patented iCMOS process, the eight monolithic DACs extend the company's dense D/A CONVERTER family offering, combining up to 40 channels, high accuracy and ±10V range, in a tiny footprint.

ADI's iCMOS process combines high-voltage silicon with submicron CMOS and complementary bipolar technologies.

Programmable on-chip features, such as calibration registers and automatic shutdown, ensure system reliability in harsh, high voltage industrial environments, while simplifying board layout, said Mike Britchfield, ADI's product line director, precision signal processing. "These devices satisfy the needs of today's systems designers trying to squeeze more and more functionality into smaller board space, particularly in ATE (pin-electronics), optical networking (switches, VOAs) and precision instrumentation applications (oscilloscopes, data generators, industrial I/O cards)," he said.

The AD5362 is said to be the first 8-channel D/A converter with bipolar voltage outputs, 16-bit differential nonlinearity (DNL) and 14-bit integral nonlinearity (INL). In addition, the D/A converter incorporates individual user-programmable offset and gain registers per channel, enabling board designers to calibrate their systems and compensate for signal errors that may occur elsewhere in the signal chain.

A 50MHz SPI-compatible serial interface offers group addressing, facilitating fast updating of multiple D/A converter channels. It also offers flexible diagnostic features, including readback and packet error checking (PEC).

The AD5362 is available in an 8-by-8mm 56-lead LFCSP. Other members of the pin-compatible AD536x family offer higher channel (16-channel) or lower resolution (14-bit) alternatives.

The AD5370 is a similar 40-channel version. A programmable 20V output span provides flexibility in customizing voltage output levels. For even greater flexibility, the device is divided into five groups of eight D/A converters. A separate input pin is also provided for each group to enable remote ground sensing. Furthermore, the AD5370 has two voltage reference pins and two offset D/A converters, enabling the user to set different output voltage ranges.

The AD536x and AD537x D/A converters are sampling now, with production planned for June 2006.

Pricing for the AD5362/AD5363 and AD5370 D/A converters ranges from $19.50 to $62.90 each, depending on configurations, in 1,000-piece quantities.

Structured ASIC demand rising, says study

Innovation in the IC industry combined with increasing demand for high-performance electronic systems is driving demand for structured ASICs, according to a study by Frost and Sullivan.

"Structured ASICs are proving to be highly promising components for next-generation devices and combine the performance/cost advantage of standard-cell ASICs and the low-risk nature of FPGAs while dramatically simplifying the design process," said Sivakumar Muthuramalingam, research analyst at Frost and Sullivan (New York).

According to Muthuramalingam, structured ASICs can slash NRE costs by over 85 percent in derivative chips and are set to become a crucial element in deep sub-micron (DSM) designs. "A significant percent of FPGA design wins could now be lost to structured ASICs that lowers cost and time to market, while increasing performance," he said.

Though the benefits of structured ASICs are known, researchers still need to address issues such as cross talk and signal integrity when implementing designs at DSM levels. In the more advanced process nodes, power leakage is a serious issue that needs to be resolved. Another challenge is in generating awareness and popularizing structured ASICs across a diverse range of end-user applications.

The target markets for structured ASICs include telecommunications, data storage and digital computing/networking that demand high performance, but require modest production volumes.
Source: EE Times