National Semiconductor Boosts FPGA Signal Integrity

National Semiconductor Corporation (NYSE: NSM) today introduced two new low-power, high-performance buffer/repeaters for its industry-leading portfolio of LVDS (low-voltage differential signaling) products.

National's DS90LV004 and SCAN90004 1.5 Gbps, four-channel buffers are the first to include configurable output pre-emphasis, hot-plug protection and 15 kV of electro-static discharge (ESD) protection. The devices boost the signal integrity of field-programmable gate arrays (FPGAs) and application specific integrated circuits (ASIC) across backplanes and cables in telecom, datacom, industrial, medical, automotive and office imaging applications. For designers who want to implement system-level test, the SCAN90004 features IEEE 1149.6 (JTAG) testability.

"The DS90LV004 and SCAN90004 dramatically improve the performance of a wide variety of designs driving high-speed signals," said Jeff Waters, product line director for the Interface division at National. "In FPGA- and ASIC-based designs, for example, these buffers can provide ESD protection up to 15 kV and deliver higher-speed and longer-reach signals over lower-cost cables and backplanes."

Technical Features of the DS90LV004 and SCAN90004 LVDS Buffer/Repeaters

The four-channel DS90LV004 drives up to four LVDS clock and/or data channels over common backplanes or simple cable configurations. The wide differential input range easily interfaces to LVDS, low voltage positive emitter-coupled logic (LVPECL) or current mode logic (CML) input levels and the output levels are fully LVDS compliant. The DS90LV004 operates at data rates up to 1.5 Gbps and includes configurable output pre-emphasis that allows the designer to "overdrive" the outputs to compensate for a lossy interconnect. The DS90LV004 also features the industry's highest 15 kV of ESD protection for maximum isolation of expensive FPGAs, ASICs and other onboard components. In power-sensitive applications, the power-down mode is useful in minimizing power consumption when all four channels of a single device are not active, as in redundancy applications.

The SCAN90004 has the same features as the DS90LV004, and also includes IEEE standard 1149.1 and 1149.6 (JTAG) testability to verify high-speed differential connections in the system. These JTAG-accessible features extend the capability of an existing system or board-level JTAG bus to high-speed mixed-signal environments.

For more information on the DS90LV004 and SCAN90004 or to order samples and an evaluation board, visit http://www.national.com/pf/DS/DS90LV004.html and http://www.national.com/pf/SC/SCAN90004.html . For more information on National's interface products, visit http://lvds.national.com . An on-demand online seminar, "Boosting FPGA and CPLD Interface Performance for Off-board Data Transmission" is available for viewing at http://www.national.com/onlineseminar/

Gap Between Analog and Digital Designers

In the past, the gap between analog and digital designers has been large. With the adoption of new DSM processes, the gap is getting smaller. The analog (transistor level IP folks also) have until recently allowed this encroachment without much concern or frustration. In a lot of cases, they were actually happy to have to dish off the long run time “in-situ” simulations to confirm the application of the design block in the middle of the “digital logic stuff”.
The digital designers, have also been happy in a safe static timing analysis (STA) and transient analysis world that has been confined to the time domain. The results were definitively interpretable and scripts could even be created in some cases, to read the results for you and let you know if it passed on a GO/NO GO condition.
Recent industry events have shown that the world is not so simple now – AC and Frequency domain analysis – One the LAST bastions of exclusivity to the analog gurus is NOW an SOC analysis technique. Mixed signal, RF, wireless, high speed interfaces, sensor interfaces, clocks, PLLs, and power grids are NOW all being looked by AC modeling tools as required signoff in the digital design flow.
This impacts the design world a lot more than people think. First it requires BOTH quantitative and qualitative interpretation of results to know what “it is good” means. Second, the models that represent these views are NOT present in .LIB files so in-house correlation and qualification of results is required – even if you bought the IP from a known good vendor. And mostly, for design group to succeed, the analog and digital guys have to get together and actually communicate on a COOPERATIVE not COMPETATIVE basis to make sure the design works. It is not practical with today’s TTM pressures, to require the analog designers to learn all about digital assertions, constraints and synthesis or to make the HDL coders and architecture folks learn about phase, harmonics and numerical idiosyncrasies of the device level models and simulators.
A lot of talk in the industry has been about the rate of adoption of the these new process nodes and the economic justifications behind migration – the bigger discussion should be – can the industry create a positive work environment and updated design methodology that actually encourages/empowers the Engineer to perform the work that they believe in and receives recognition for – or we are doom to fail to grow the industry as it will become just a bunch of “tool operators” who do not know WHY they are using item 4 from the third pull down menu on the left.

Very-large-scale integration

Very-large-scale integration (VLSI) of systems of transistor-based
circuits into integrated circuits on a single chip first occurred in
the 1980s as part of the semiconductor and communication technologies
that were being developed.

The first semiconductor chips held one transistor each. Subsequent
advances added more and more transistors, and as a consequence more
individual functions or systems were integrated over time. The
microprocessor is a VLSI device.

The first "generation" of computers relied on vacuum tubes. Then came
discrete semiconductor devices, followed by integrated circuits. The
first Small-Scale Integration (SSI) ICs had small numbers of devices on
a single chip - diodes, transistors, resistors and capacitors (no
inductors though), making it possible to fabricate one or more logic
gates on a single device. The fourth generation consisted of
Large-Scale Integration (LSI), i.e. systems with at least a thousand
logic gates. The natural successor to LSI was VLSI (many tens of
thousands of gates on a single chip). Current technology has moved far
past this mark and today's microprocessors have many million gates and
hundreds of millions of individual transistors.

As of mid-2004, billion-transistor processors are not yet economically
feasible for most uses, but they are achievable in laboratory settings,
and they are clearly on the horizon as semiconductor fabrication moves
from the current generation of 90 nanometer (90nm) processes to the
next 65nm and 45nm generations.

At one time, there was an effort to name and calibrate various levels
of large-scale integration above VLSI. Terms like Ultra-large-scale
Integration (ULSI) were used. But the huge number of gates and
transistors available on common devices has rendered such fine
distinctions moot. Terms suggesting more-than-VLSI levels of
integration are no longer in widespread use. Even VLSI is now somewhat
quaint, given the common assumption that all microprocessors are VLSI
or better.

VLSI Conferences

DAC - Design Automation Conference CAS - IEEE Circuits and Systems Conferences ICSVLSI- IEEE Computer Society Annual Symposium on VLSI EDS - IEEE EDS Meetings Calendar EDS - IEEE EDS Sponsored, Cosponsored & Topical Conferences IEDM - IEEE International Electron Devices Meeting

VLSI Journals

ED - IEEE Transactions on Electron Devices
EDL - IEEE Electron Device Letters
CAD - IEEE Transactions on Computer-Aided Design of Integrated Circuits
and Systems
JSSC - IEEE Journal of Solid-State Circuits
VLSI - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
CAS II - IEEE Transactions on Circuits and Systems II: Analogy and
Digital Signal Processing
SM - IEEE Transactions on Semiconductor Manufacturing
SSE - Solid-State Electronics
SST - Solid-State Technology
TCAD - Journal of Technology Computer-Aided Design

Further reading

Carver Mead, Lynn Conway, Introduction to VLSI Systems (Addison-Wesley,
1980)
Neil H.E. Weste, David Harris, CMOS VLSI Design (Addison-Wesley, 3rd
Edition)